Chapter 2. Digital Test Architectures
Laung-Terng (L.-T.) WangSynTest Technologies, Inc., Sunnyvale, California
About This Chapter
Design for testability (DFT) has become an essential part for designing very-large-scale integration (VLSI) circuits. The most popular DFT techniques in use today for testing the digital logic portion of the VLSI circuits include scan and scan-based logic built-in self-test (BIST). Both techniques have proved to be quite effective in producing testable VLSI designs. Additionally, test compression, a supplemental DFT technique to scan, is growing in importance for further reducing test data volume and test application time during manufacturing test.
To provide readers with an in-depth understanding of the most recent DFT ...