APPENDIX D
Nested Vectored Interrupt Controller and System Control Block Registers Quick Reference
Table D.1
Interrupt Controller Type Register (0xE000E004)
| Bits | Name | Type | Reset Value | Description |
| 4:0 | INTLINESNUM | R | — | Number of interrupt inputs in steps of 320 = 1–321 = 33–64… |
Table D.2
Auxiliary Control Register (0xE000E008)
| Bits | Name | Type | Reset Value | Description |
| 2 | DISFOLD | R/W | 0 | When this bit is set, it disables the overlapping of the IT execution cycle with another instruction. The overlapping (called IT folding) is an optimization to allow faster execution of conditional execution. |
| 1 | DISDEFWBUF | R/W | 0 | When this bit is set, it disables the use of write buffers within the ... |
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