
46 The Essential Guide to Serial ATA and SATA Express
Registers, and the host will wait until this bit is cleared (BSY=0) before it proceeds with the
I/O process.
– DRQ (Data Request) bit in Status or Alternate Status Registers. This bit informs the host
that the device is ready to transfer a word or byte of data between the host and the device.
– INTRQ (Device Interrupt) is a control signal on the ATA bus. This signal is set by the device
when it needs to interrupt the host system. Except in a few cases, this signal is generated
by the device whenever the device changes the BSY bit from 1 to 0. INTRQ is “advice” to
the host telling the host ...