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The Essential Guide to Serial ATA and SATA Express
book

The Essential Guide to Serial ATA and SATA Express

by David A. Deming
October 2014
Intermediate to advanced content levelIntermediate to advanced
496 pages
15h 38m
English
Auerbach Publications
Content preview from The Essential Guide to Serial ATA and SATA Express
46 The Essential Guide to Serial ATA and SATA Express
Registers, and the host will wait until this bit is cleared (BSY=0) before it proceeds with the
I/O process.
– DRQ (Data Request) bit in Status or Alternate Status Registers. This bit informs the host
that the device is ready to transfer a word or byte of data between the host and the device.
– INTRQ (Device Interrupt) is a control signal on the ATA bus. This signal is set by the device
when it needs to interrupt the host system. Except in a few cases, this signal is generated
by the device whenever the device changes the BSY bit from 1 to 0. INTRQ is “advice” to
the host telling the host ...
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Publisher Resources

ISBN: 9781482243314