April 2024
Intermediate to advanced
550 pages
11h 36m
English
In the previous chapter, we discussed state machines. We looked at how we can use state machines to design a simple calculator and looked at some more complex operations, such as division. This allowed us to see a practical example of complex state machine design. We briefly discussed packaging for reuse and demonstrated this with a simple traffic light controller.
In this chapter, we are going to look at some of the underlying FPGA resources in more detail. You’ve been briefly introduced to some of these, such as Random Access Memory (RAM) and Digital Signal Processing (DSP) blocks, while others have been glossed over, such as Phase Locked Loops (PLLs), where we used one to fix a timing problem in our calculator ...