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Introduction to AXI
In Chapter 7, Math Parallelism and Pipelined Design, we learned what sets FPGAs apart from microprocessors. We looked at fixed-point and floating-point numbers and how to use the Xilinx components utilizing AXI streaming interfaces. We added floating-point math to our temperature sensor and took a look at how FPGAs can operate in massively parallel designs. In this chapter, we’ll take a look at the interface that FPGA vendors have standardized on, AXI.
As FPGAs became larger and more complex, vendors such as Xilinx began offering Intellectual Property (IP), designed and tested to accelerate design implementation. The first IP often had simple interfaces, sometimes referred to as native interfaces. Xilinx offered early high-end ...
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