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Top-Down Digital VLSI Design by Hubert Kaeslin

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Chapter 2

Field-Programmable Logic

Abstract

What makes Field-Programmable Logic (FPL) attractive in many applications are their short turnaround times and low up-front costs. The hundreds of variations may be confusing, however, and our text explains the key commonalities and differences between popular device families. The configuration technology (SRAM, flash, antifuse) defines whether a device is reconfigurable or one-time programmable, and whether the configuration persists after power down. How hardware resources are organized internally sets apart Field-Programmable Gate Arrays (FPGA) from Complex Programmable Logic Devices (CPLD). Extra circuits such as block RAMs, configurable datapath units, hardwired dedicated building blocks, and ...

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