Top-Down Digital VLSI Design

4.3.4 An event-driven scheme of execution

The need for a mechanism that schedules process execution

Recall the concurrent SystemVerilog constructs introduced in section 4.3.2.

 Continuous assignment.

 Procedural blocks always_comb, always_ff, and always_latch (for circuit modeling).

 Procedural blocks always, initial, and final (for testbenches).

Simulation must, of course, yield the same result as if the many processes present in a circuit model ...