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Top-Down Digital VLSI Design by Hubert Kaeslin

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Chapter 5

Functional Verification

Abstract

Functional verification is the most critical step in the VLSI design flow. The text begins with an overview on rapid prototyping and other options for arriving at valid functional specifications for a circuit to be. The bulk of the chapter discusses simulation strategies that maximize the likelihood of uncovering design flaws with a reasonable effort. This includes automatic response checking, assertion-based “self-checking” circuit models, corner cases, real-world data, directed random stimuli, and statistical coverage analysis. Case studies provide opportunities to learn from failures. The remainder is concerned with making simulation vectors portable across the entire design and test cycle from ...

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