Certain coding practices are simply good practices. Verilog, like other programming languages, offers many features that allow for the creation of very complex structures. However, these features, if used poorly, can create hardware that, while correct, is overly complex or difficult to understand and debug. One important feature of an HDL is the ability to understand the hardware and debug it. In addition, portability is an extremely important consideration. If the code works, but sections cannot be lifted and used for other designs, a critical feature has been lost. In this section, I go over some basic guidelines for producing code that is readable, easy to debug, portable, and modular.