Appendix C

VHDL-2008: New Features

VHDL 2008 has come as a major modification to IEEE VHDL after its 1076-93 version. Significant changes are made making VHDL more designer friendly.

PSL is integrated into VHDL

PSL is a language tool developed for verification using assertions regarding properties of design under a set of assumptions. VHDL already includes the assert statement, which is used for adding simple check on violations in VHDL models.

VHDL extends this idea by integrating PSL as a part of VHDL, providing a syntax for describing the expected behaviour of a circuit over time and for checking that the VHDL code implements that behaviour.

VHDL 2008 includes the basic subset of PSL as a part of its standard syntax. Therefore, all the keywords ...

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