June 2019
Intermediate to advanced
752 pages
22h 19m
English
The design of an IP core entails the development and release of a set of models for subsequent SoC methodology flow integration. These models are described in the following sections.
The functional IP model is compiled into the SoC simulation environment. The model source is commonly provided as part of the IP license, typically in a hardware description language (HDL) format. For hard IP, for added security of the intellectual property, a compiled binary is licensed, with a set of EDA simulation tool application program interface functions to initialize, exercise, and query the behavior. An HDL model can be developed at different levels ...