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VLSI Design Methodology Development, First Edition
book

VLSI Design Methodology Development, First Edition

by Thomas Dillinger
June 2019
Intermediate to advanced content levelIntermediate to advanced
752 pages
22h 19m
English
Pearson
Content preview from VLSI Design Methodology Development, First Edition

Chapter 5. Characteristics of Functional Validation

5.1 Software Simulation

The evaluation of hardware description language (HDL) model functionality is based on the paradigm of event-driven simulation. As mentioned in Section 4.1, an HDL model consists of a set of concurrent sequential processes. The evaluation of a process is triggered by an event in the sensitivity list for the process, typically a transition on a signal in the list. The result of the process evaluation is the assignment of a new value to variables and signals; the new signal values are scheduled in future time on the event queue maintained by the HDL simulator. When all active processes complete evaluation at the current time, the top of the event queue is queried, and ...

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Publisher Resources

ISBN: 9780135657645