Book Description
Digital audio, speech recognition, cable modems, radar, highdefinition televisionthese are but a few of the modern computer and communications applications relying on digital signal processing (DSP) and the attendant applicationspecific integrated circuits (ASICs). As informationage industries constantly reinvent ASIC chips for lower power consumption and higher efficiency, there is a growing need for designers who are current and fluent in VLSI design methodologies for DSP.
Enter VLSI Digital Signal Processing Systemsa unique, comprehensive guide to performance optimization techniques in VLSI signal processing. Based on Keshab Parhi's highly respected and popular graduatelevel courses, this volume is destined to become the standard text and reference in the field. This text integrates VLSI architecture theory and algorithms, addresses various architectures at the implementation level, and presents several approaches to analysis, estimation, and reduction of power consumption.
Throughout this book, Dr. Parhi explains how to design highspeed, lowarea, and lowpower VLSI systems for a broad range of DSP applications. He covers pipelining extensively as well as numerous other techniques, from parallel processing to scaling and roundoff noise computation. Readers are shown how to apply all techniques to improve implementations of several DSP algorithms, using both ASICs and offtheshelf programmable digital signal processors.
The book features hundreds of graphs illustrating the various DSP algorithms, examples based on digital filters and transforms clarifying key concepts, and interesting endofchapter exercises that help match techniques with applications. In addition, the abundance of readily available techniques makes this an extremely useful resource for designers of DSP systems in wired, wireless, or multimedia communications. The material can be easily adopted in new courses on either VLSI digital signal processing architectures or highperformance VLSI system design.
An invaluable reference and practical guide to VLSI digital signal processing.
A tremendous source of optimization techniques indispensable in modern VLSI signal processing, VLSI Digital Signal Processing Systems promises to become the standard in the field. It offers a rich training ground for students of VLSI design for digital signal processing and provides immediate access to stateoftheart, proven techniques for designers of DSP applicationsin wired, wireless, or multimedia communications.
Topics include:
Transformations for high speed using pipelining, retiming, and parallel processing techniques
Power reduction transformations for supply voltage reduction as well as for strength or capacitance reduction
Area reduction using folding techniques
Strategies for arithmetic implementation
Synchronous, wave, and asynchronous pipelining
Design of programmable DSPs.
An Instructor's Manual presenting detailed solutions to all the problems in the book is available from the Wiley editorial department.
Table of Contents
 Cover Page
 Halftitle Page
 Title Page
 Copyright
 Dedication
 Contents
 Preface
 1 Introduction to Digital Signal Processing Systems
 2 Iteration Bound
 3 Pipelining and Parallel Processing
 4 Retiming
 5 Unfolding
 6 Folding
 7 Systolic Architecture Design
 8 Fast Convolution
 9 Algorithmic Strength Reduction in Filters and Transforms

10 Pipelined and Parallel Recursive and Adaptive Filters
 10.1 Introduction
 10.2 Pipeline Interleaving in Digital Filters
 10.3 Pipelining in lstOrder MR Digital Filters
 10.4 Pipelining in HigherOrder IIR Digital Filters
 10.5 Parallel Processing for IIR filters
 10.6 Combined Pipelining and Parallel Processing for IIR Filters
 10.7 LowPower IIR Filter Design Using Pipelining and Parallel Processing
 10.8 Pipelined Adaptive Digital Filters
 10.9 Conclusions
 10.10 Problems
 References

11 Scaling and Roundoff Noise
 11.1 Introduction
 11.2 Scaling and Roundoff Noise
 11.3 State Variable Description of Digital Filters
 11.4 Scaling and Roundoff Noise Computation
 11.5 Roundoff Noise in Pipelined IIR Filters
 11.6 Roundoff Noise Computation Using State Variable Description
 11.7 SlowDown, Retiming, and Pipelining
 11.8 Conclusions
 11.9 Problems
 References

12 Digital Lattice Filter Structures
 12.1 Introduction
 12.2 Schur Algorithm
 12.3 Digital Basic Lattice Filters
 12.4 Derivation of OneMultiplier Lattice Filter
 12.5 Derivation of Normalized Lattice Filter
 12.6 Derivation of ScaledNormalized Lattice Filter
 12.7 Roundoff Noise Calculation in Lattice Filters
 12.8 Pipelining of Lattice IIR Digital Filters
 12.9 Design Examples of Pipelined Lattice Filters
 12.10 LowPower CMOS Lattice IIR Filters
 12.11 Conclusions
 12.12 Problems
 References
 13 BitLevel Arithmetic Architectures

14 Redundant Arithmetic
 14.1 Introduction
 14.2 Redundant Number Representations
 14.3 CarryFree Radix2 Addition and Subtraction
 14.4 Hybrid Radix4 Addition
 14.5 Radix2 Hybrid Redundant Multiplication Architectures
 14.6 Data Format Conversion
 14.7 Redundant to Nonredundant Converter
 14.8 Conclusions
 14.9 Problems
 References
 15 Numerical Strength Reduction

16 Synchronous, Wave, and Asynchronous Pipelines
 16.1 Introduction
 16.2 Synchronous Pipelining and Clocking Styles
 16.3 Clock Skew and Clock Distribution in BitLevel Pipelined VLSI Designs
 16.4 Wave Pipelining
 16.5 Constraint Space Diagram and Degree of Wave Pipelining
 16.6 Implementation of WavePipelined Systems
 16.7 Asynchronous Pipelining
 16.8 Signal Transition Graphs
 16.9 Use of STG to Design Interconnection Circuits
 16.10 Implementation of Computational Units
 16.11 Conclusions
 16.12 Problems
 References
 17 LowPower Design
 18 Programmable Digital Signal Processors
 Appendix A: Shortest Path Algorithms
 Appendix B: Scheduling and Allocation Techniques
 Appendix C: Euclidean GCD Algorithm
 Appendix D: Orthonormality of Schur Polynomials
 Appendix E: Fast Binary Adders and Multipliers
 Appendix F: Scheduling in BitSerial Systems
 Appendix G: Coefficient Quantization in FIR Filters
 Index
 Backcover
Product Information
 Title: VLSI Digital Signal Processing Systems: Design and Implementation
 Author(s):
 Release date: January 1999
 Publisher(s): WileyInterscience
 ISBN: 9780471241867