Wireless Transceiver Architecture

Preface

The origins of this book lie in the frequent questions that I have been asked by colleagues in the different companies I have worked for about how to proceed in the dimensioning and optimization of a transceiver line-up. The recurrence of those questions, along with the problem of identifying suitable reference sources, made me think there could be a gap in the literature. There is indeed an abundant literature on the physical implementation of wireless transceivers (e.g. the RF/analog CMOS design), or on digital communications theory itself (e.g. the signal processing required), but little on how to proceed for dimensioning and optimizing a transceiver line-up.

Furthermore, the fact is that those questions were coming from two distinct categories of engineers. On the one hand, RF/analog designers are curious to understand how the specifications of their blocks are derived. On the other hand, the digital signal processing engineers in charge of the baseband algorithms need to understand the mechanisms involved in the degradation of the wanted signal along the line-up for optimizing their processing. Obviously, it is the job of an RFIC architect to make the link between the two communities and to attempt to overcome the communication problems between those two groups. Roughly speaking, you have on the one hand the baseband engineers that process complex envelopes while benchmarking their algorithms using AWGN, and on the other hand the RF/analog designers that optimize ...