© Slobodan Mijalković 2022
S. MijalkovićA Practical Guide to Verilog-Ahttps://doi.org/10.1007/978-1-4842-6351-8_8

8. Branches

Slobodan Mijalković1  
(1)
The Hague, Zuid-Holland, The Netherlands
 

A behavioral description of an analog system is constructed as a network of interconnected branches. The constitutive equations of the system component are formulated in terms of branch potential and flow signals. This chapter describes how to declare branches as well as how to access and contribute branch signals.

Declaring Branches

A branch is a path between two nets representing branch terminals. A branch can only be declared inside a module scope along with net and port declarations and not in named procedural blocks. The branches can be declared as scalar ...

Get A Practical Guide to Verilog-A: Mastering the Modeling Language for Analog Devices, Circuits, and Systems now with the O’Reilly learning platform.

O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.