Chapter 5
ROM-Based Logic Design: A Low-Power Design Perspective
5.1 Introduction
Conventionally, digital functions are implemented using logic gates for real-time computation. This approach has been successfully adopted in all high-performance and low-power designs today. On the other hand, memorizing the output of a function for all possible input combinations is an alternative way to implement a logic function (ROM-based logic (RBL) design). In this approach, instead of evaluating a logic function in real time, the output is read from the ROM (read-only memory), where all possible outputs are pre-stored. The input bits of the function are then used as the address to access the ROM in such implementation (Fig 5.1). The approach was first used by IBM back in 19591 [1]. IBM used this concept in their 1620 series computers (popularly known as CADET: Can't Add, Doesn't Even Try), which used lookup tables instead of logic circuitry for computation. Similar approach is also used to generate series functions such as logarithmic numbers and sinusoidal functions [2,4]. However, implementing high-activity large digital functions (e.g., adder, multiplier, etc.) for state-of-the-art high-performance computations has not been extensively explored. This is mainly because the required memory size in this approach grows exponentially (2N × O, where N is the number of inputs and O is the number of outputs) with the number of inputs and ...
