Chapter 8
Analog Circuit Design for SOI
In the last two decades silicon on insulator (SOI) has progressed from use in specialized niche applications to a mainstream technology of choice for low power and high performance ICs, especially in the microprocessor arena [1]. During this time digital circuitry has been considered in detail [2, 3], and analog and memory circuit designs have also been described [3, 4]. Along with circuit developments and the learning process that accompanied this in modeling, design and test, technology has advanced at a pace that has exceeded the development of bulk silicon (indeed, SOI has been able to incorporate many bulk developments made during this time, and has added some advances of its own). From the PDSOI material processes of the late 1990s and early 2000s, MOSFET channel lengths and SOI layer thickness reduced, and while PDSOI still finds significant use, finFET and other fully depleted SOI options are currently as likely to be the process of choice. In this review, we discuss design techniques in PDSOI and FinFET, specifically from an analog perspective.
8.1 SOI Devices
Instead of creating components directly in a silicon substrate, as with bulk silicon processes, devices on SOI sit on an insulating oxide structure. If the active silicon region is relatively thick, the resultant components are said to be partially depleted. If the region is thin or if transistors are constructed ...
