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Advanced Circuits for Emerging Technologies by Krzysztof Iniewski

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Chapter 20

Low-Power Testing for Low-Power LSI Circuits

Xiaoqing Wen

Kyushu Institute of Technology, Iizuka, Fukuoka, Japan

Yervant Zorian

Synopsys, Inc., Mountain View, CA, USA

20.1 Introduction

Area, performance, and power have always been critical elements for the semiconductor industry; their priorities, however, have been changing over the years, driven mostly by process technologies and market needs. Nowadays, the priority order is predominantly power→performance→area (PPA) simply because, for example, silicon has become cheap but battery life has not. As illustrated in Fig. 20.1, high functionality and low power are undoubtedly two indispensable ingredients to any success in the semiconductor industry [1].

Figure 20.1 Low-power design and low-power test.

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Designers have been tirelessly developing hardware and software techniques for effectively reducing functional power [2]. Functional constraints are often exploited at various levels to remove wasteful operations so that functional power is saved. For example, a system-on-chip (SoC) circuit designed for cell phone applications contains multiple functional blocks that do not need to be activated simultaneously, for example, a mailing block and a calling block. Disabling unnecessary circuit blocks for a specific function significantly reduces functional power.

However, successfully taping-out a low-power design is only part ...

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