Advanced Frequency Synthesis by Phase Lock

Advanced Frequency Synthesis by Phase Lock

by William F. Egan
Released August 2011
Publisher(s): Wiley-IEEE Press
ISBN: 9780470915660

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Book description

The latest frequency synthesis techniques, including sigma-delta, Diophantine, and all-digital

Sigma-delta is a frequency synthesis technique that has risen in popularity over the past decade due to its intensely digital nature and its ability to promote miniaturization. A continuation of the popular Frequency Synthesis by Phase Lock, Second Edition, this timely resource provides a broad introduction to sigma-delta by pairing practical simulation results with cutting-edge research. Advanced Frequency Synthesis by Phase Lock discusses both sigma-delta and fractional-n—the still-in-use forerunner to sigma-delta—employing Simulink® models and detailed simulations of results to promote a deeper understanding.

After a brief introduction, the book shows how spurs are produced at the synthesizer output by the basic process and different methods for overcoming them. It investigates how various defects in sigma-delta synthesis contribute to spurs or noise in the synthesized signal. Synthesizer configurations are analyzed, and it is revealed how to trade off the various noise sources by choosing loop parameters. Other sigma-delta synthesis architectures are then reviewed.

The Simulink simulation models that provided data for the preceding discussions are described, providing guidance in making use of such models for further exploration. Next, another method for achieving wide loop bandwidth simultaneously with fine resolution—the Diophantine Frequency Synthesizer—is introduced. Operation at extreme bandwidths is also covered, further describing the analysis of synthesizers that push their bandwidths close to the sampling-frequency limit. Lastly, the book reviews a newly important technology that is poised to become widely used in high-production consumer electronics—all-digital frequency synthesis.

Detailed appendices provide in-depth discussion on various stages of development, and many related resources are available for download, including Simulink models, MATLAB® scripts, spreadsheets, and executable programs. All these features make this authoritative reference ideal for electrical engineers who want to achieve an understanding of sigma-delta frequency synthesis and an awareness of the latest developments in the field.

Table of contents

  1. Cover Page
  2. Title Page
  3. Copyright
  4. Dedication
  5. CONTENTS
  6. PREFACE
    1. ACKNOWLEDGMENTS
  7. SYMBOLS LIST AND GLOSSARY
  8. CHAPTER 1: INTRODUCTION
    1. 1.1 PHASE-LOCKED SYNTHESIZER
    2. 1.2 FRACTIONAL-N FREQUENCY SYNTHESIS
    3. 1.3 REPRESENTING A CHANGE IN DIVIDE NUMBER
    4. 1.4 UNITS
    5. 1.5 REPRESENTING PHASE NOISE
    6. 1.6 PHASE NOISE AT THE SYNTHESIZER OUTPUT
    7. 1.7 OBSERVING THE OUTPUT SPECTRUM
  9. CHAPTER 2: FRACTIONAL-N AND BASIC ΣΔ SYNTHESIZERS
    1. 2.1 FIRST-ORDER FRACTIONAL-N
    2. 2.2 SECOND-ORDER FRACTIONAL-N
    3. 2.3 HIGHER ORDER FRACTIONAL-N
    4. 2.4 SPECTRUMS WITH CONSTANT SAMPLING RATE
    5. 2.5 SUMMARY OF SPECTRUMS
    6. 2.6 SUMMARY
  10. CHAPTER 3: OTHER SPURIOUS REDUCTION TECHNIQUES
    1. 3.1 LSB DITHER
    2. 3.2 MAXIMUM SEQUENCE LENGTH
    3. 3.3 SHORTENED ACCUMULATORS AND LOWER PRIMES
    4. 3.4 LONG SEQUENCE
    5. 3.5 SUMMARY
  11. CHAPTER 4: DEFECTS IN ΣΔ SYNTHESIZERS
    1. 4.1 NOISE MODELS
    2. 4.2 LEVELS OF OTHER NOISE IN ΣΔ SYNTHESIZERS
    3. 4.3 NOISE SOURCES: EQUIVALENT INPUT NOISE
    4. 4.4 DISCRETE SIDEBANDS
    5. 4.5 SUMMARY
  12. CHAPTER 5: OTHER ΣΔ ARCHITECTURES
    1. 5.1 STABILITY
    2. 5.2 FEEDBACK 30
    3. 5.3 FEEDFORWARD 32
    4. 5.4 QUANTIZER OFFSET
    5. 5.5 MASH-n 1 n 2 n 3 36
    6. 5.6 CANCELLATION OF QUANTIZATION NOISE IN THE GENERAL MODULATOR
    7. 5.7 FRACTIONAL SWALLOWS
    8. 5.8 HARDWARE REDUCTION
  13. CHAPTER 6: SIMULATION
    1. 6.1 SandH.mdl
    2. 6.2 SandHreverse.mdl
    3. 6.3 CPandI.mdl
    4. 6.4 Dither.mdl
    5. 6.5 HandK.mdl
    6. 6.6 SimplePD.mdl
    7. 6.7 CPandIplus.mdl
    8. 6.8 CPandITrunc.mdl
    9. 6.9 ADAPTING A MODEL
    10. 6.10 EFeedback.mdl
    11. 6.11 FeedForward.mdl
    12. 6.12 MASH MODULATOR SCRIPTS
    13. 6.13 SynStep__.mdl
    14. 6.14 OTHER METHODS
  14. CHAPTER 7: DIOPHANTINE SYNTHESIZER
    1. 7.1 TWO-LOOP SYNTHESIZER
    2. 7.2 MULTILOOP SYNTHESIZERS
    3. 7.3 MATLAB SCRIPTS
    4. 7.4 SIGNAL MIXING
    5. 7.5 REFERENCE-FREQUENCY COUPLING
    6. 7.6 CENTER FREQUENCIES
  15. CHAPTER 8: OPERATION AT EXTREME BANDWIDTHS
    1. 8.1 DETERMINING THE EFFECTS OF SAMPLING
    2. 8.2 A PARTICULAR CASE
    3. 8.3 WHEN ARE SAMPLING EFFECTS IMPORTANT?
    4. 8.4 COMPUTER PROGRAM
    5. 8.5 SAMPLING EFFECTS IN ΣΔ SYNTHESIZERS
  16. CHAPTER 9: ALL-DIGITAL FREQUENCY SYNTHESIZERS
    1. 9.1 THE FLYING ADDER SYNTHESIZER
    2. 9.2 ADPLL SYNTHESIZER
  17. APPENDIX A: ALL DIGITAL
    1. A.1 FLYING ADDER CIRCUITS
    2. A.2 ADPLL SYNTHESIZER
  18. APPENDIX C: FRACTIONAL CANCELLATION
    1. C.1 MODULATOR DETAILS
    2. C.2 FIRST ACCUMULATOR
    3. C.3 SECOND ACCUMULATOR
    4. C.4 ADDITIONAL ACCUMULATORS
    5. C.5 ACCUMULATOR WITHOUT INPUT REGISTER
  19. APPENDIX E: EXCESS PPSD
    1. E.1 DEVELOPMENT OF EQ. (2.4)
    2. E.2 APPROXIMATING k P AS CONSTANT
    3. E.3 APPROXIMATION IN EQ. (E.8)
  20. APPENDIX F: REFERENCES TO FS2
  21. APPENDIX G: USING Gsmpl
    1. G.1 OPEN-LOOP TRANSFER FUNCTION
    2. G.2 CLOSED-LOOP RESPONSES
    3. G.3 SAVING RESULTS
    4. G.4 VERSION NUMBER
    5. G.5 EXAMPLE SESSION
    6. G.6 GENERATING ANALYSIS PLOTS
    7. G.7 VERIFICATION OF GARDNER’S STABILITY LIMITS
    8. G.8 THE NYQUIST PLOT
  22. APPENDIX H: SAMPLE-AND-HOLD CIRCUIT
    1. H.1 TRANSIENT PERFORMANCE
    2. H.2 FILTER CAPACITOR BEFORE SAMPLER
  23. APPENDIX L: LOOP RESPONSE
    1. L.1 PRIMARY LOOP
    2. L.2 DAMPED LOOP
  24. APPENDIX M: MASH PPSD
    1. M.1 MASH MODULATOR: FIRST STAGE
    2. M.2 MASH MODULATOR: SECOND ORDER
    3. M.3 MASH MODULATOR: HIGHER ORDER
    4. M.4 VARIANCES
    5. M.5 SOME PARAMETERS OF S φ
    6. M.6 PREVIOUS DEVELOPMENT
    7. M.7 SOME MASH MODULATOR CHARACTERISTICS
    8. M.8 CHARACTERISTICS OF MATLAB SCRIPTS MASHONE AND MASHALL_
  25. APPENDIX N: SAMPLED NOISE
    1. N.1 CASE 1: W n « f ref
    2. N.2 CASE 2: 1 ∕ T » W n » f ref
    3. N.3 CASE 3: W n » 1/ T » f ref
    4. N.4 VARIANCE OF SAMPLED NOISE (1/ T » f ref)
    5. N.5 CONVOLUTION OF PSDs
    6. N.6 REPRESENTING SQUARED PSDs
  26. APPENDIX O: OSCILLATOR SPECTRUMS
  27. APPENDIX P: PHASE DETECTORS
  28. APPENDIX Q: QUANTIZATION PPSD
    1. Q.1 DEVELOPMENT OF Eq. (Q.1)
    2. Q.2 SUPERPOSITION
    3. Q.3 NEW SYNTHESIZED FREQUENCY
    4. Q.4 LOOP RESPONSE
    5. Q.5 VERIFICATION OF THE EFFECT OF SAMPLING ON THE LOOP
  29. APPENDIX R: REFERENCE FREQUENCY SPURS
    1. R.1 LEAKAGE CURRENT
    2. R.2 PULSE OFFSET
    3. R.3 ΣΔ MODULATION
    4. R.4 EFFECT OF ΣΔ MODULATION ON PULSE OFFSET SPURS
    5. R.5 EFFECT OF ΣΔ MODULATION ON LEAKAGE SPURS
    6. R.6 EFFECTS OF RESAMPLING
  30. APPENDIX S: SPECTRUM ANALYSIS
    1. S.1 SPECTRUMS
    2. S.2 THE SPECTRUM ANALYZER
    3. S.3 THE WINDOW FUNCTION
    4. S.4 DENSITY AND DISCRETE SPURS
    5. S.5 CONTROL PARAMETERS
    6. S.6 FREQUENCY CONVERSION IN AN ANALYZER
    7. S.7 DISPLAYING L, FPSD, AND PPSD
    8. S.8 SPECTRAL OVERLAPS
    9. S.9 ANOMALOUS SPURS
  31. APPENDIX T: TOOLBOXES
  32. APPENDIX U: NOISE PRODUCED BY CHARGE PUMP CURRENT UNBALANCE (MISMATCH)
  33. APPENDIX W: GETTING FILES FROM THE WILEY INTERNET SITE
  34. APPENDIX X: SOME TABLES
    1. X.1 ACCUMULATOR SHORTENING
    2. X.2 SEQUENCE LENGTHS
  35. END NOTES
  36. REFERENCES
  37. INDEX

Product information

  • Title: Advanced Frequency Synthesis by Phase Lock
  • Author(s): William F. Egan
  • Release date: August 2011
  • Publisher(s): Wiley-IEEE Press
  • ISBN: 9780470915660