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Advanced Signal Integrity For High-Speed Digital Designs
book

Advanced Signal Integrity For High-Speed Digital Designs

by STEPHEN H. HALL, HOWARD L. HECK
March 2009
Intermediate to advanced
680 pages
18h 13m
English
Wiley-IEEE Press
Content preview from Advanced Signal Integrity For High-Speed Digital Designs

7

DIFFERENTIAL SIGNALING

7.1 Removal of Common-Mode Noise

7.2 Differential Crosstalk

7.3 Virtual Reference Plane

7.4 Propagation of Modal Voltages

7.5 Common Terminology

7.6 Drawbacks of Differential Signaling

7.6.1 Mode Conversion

7.6.2 Fiber-Weave Effect

References

Problems

When the interconnections between drivers and receivers on a bus are implemented with a dedicated transmission line for each bit, the signaling scheme is said to be single ended. Buses designed with single-ended signaling generally work well up to approximately 1 to 2 Gb/s. As data rates increase, it becomes increasingly difficult to maintain adequate signal integrity because digital systems are notoriously noisy. For example, large arrays of I/O circuits used to drive digital information onto the bus induce noise on the power and ground planes called simultaneous switching noise (for a complete description, see a book by Hall et al. [2000]). There are many other sources of noise that can severely distort the integrity of the digital waveform such as crosstalk (as discussed in Chapter 4) and nonideal current return paths (as discussed in Chapter 10). With single-ended signaling, each data bit is transmitted on a single transmission line and latched into the receiver with the bus clock. The decision of whether the bit is a 0 or a 1 is determined by comparing the received waveform to a reference voltage vref. If the received waveform has a voltage greater than vref, the signal is latched in as a 1, and if it ...

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Publisher Resources

ISBN: 9780470192351Purchase book