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Advanced Signal Integrity For High-Speed Digital Designs by HOWARD L. HECK, STEPHEN H. HALL

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13

MODELING AND BUDGETING OF TIMING JITTER AND NOISE

13.1 Eye Diagram

13.2 Bit Error Rate

13.2.1 Worst-Case Analysis

13.2.2 Bit Error Rate Analysis

13.3 Jitter Sources and Budgets

13.3.1 Jitter Types and Sources

13.3.2 System Jitter Budgets

13.4 Noise Sources and Budgets

13.4.1 Noise Sources

13.4.2 Noise Budgets

13.5 Peak Distortion Analysis Methods

13.5.1 Superposition and the Pulse Response

13.5.2 Worst-Case Bit Patterns and Data Eyes

13.5.3 Peak Distortion Analysis Including Crosstalk

13.5.4 Limitations

13.6 Summary

References

Problems

This chapter ties together the concepts presented in previous chapters with the intent of providing the reader with a method for managing timing noise and voltage noise successfully in order to create a successful multi-Gb/s design. We start by introducing the eye diagram as a tool for evaluating the performance of a signaling interface, introducing eye width and eye height as key metrics. The eye diagram is also a fundamental prerequisite to understanding the bit error rate (BER) of a link. Modern high-speed interfaces are designed to a specified BER and data rate, which often determines the amount of voltage and timing noise allowed on a link. Accordingly, the chapter is centered on the concept of bit error rate, and we relate each of the analysis techniques described in the chapter to the BER to provide a useful design methodology.

Following the introduction to bit error rate, we discuss sources of timing variation, known as jitter, that degrade ...

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