Advances in Analog and RF IC Design for Wireless Communication Systems

Chapter 12

Time-to-Digital Conversion for Digital Frequency Synthesizers

Michael H. Perrott,    Masdar Institute, Abu Dhabi, UAE

Introduction

Digital phase-locked loops have recently emerged as a viable alternative to traditional analog structures when implementing frequency synthesizers for wireless communication. Figure 12.1 illustrates a block diagram for a digital fractional-N frequency synthesizer. This PLL structure achieves feedback by comparing the relative time difference between edges of a reference frequency and the frequency-divided output of a digitally controlled oscillator (DCO) through the use of a time-to-digital converter (TDC). The TDC output, in turn, is passed into a digital loop filter and then into the digital tuning ...