All-Digital Frequency Synthesizer in Deep-Submicron CMOS

CHAPTER 2

DIGITALLY CONTROLLED OSCILLATOR

As discussed in Section 1.1, the phase and frequency information of a discrete-time oscillator is contained not in the local waveform fit to the ideal sinusoid but in the significant (rising or falling) edge transition instances. If a transition timestamp represents a positive zero crossing of an arbitrary-amplitude sinusoid, this should provide a sufficient amount of phase information. However, for practical reasons it is necessary for the digital signal to have the same frequency as the desired output signal; therefore, falling edge transitions are naturally generated halfway between positive edge transitions.

From an information theory standpoint, this is a very efficient mechanism to represent a signal containing phase and frequency information. It is in close alignment with the fundamental strength of the digital deep-submicron CMOS processes stated in Section 1.4.2: Time-domain resolution is superior to voltage-domain resolution.

The oscillator presented is a cell with only digital inputs/outputs (I/Os) operating in the discrete-time domain, even though the underlying functionality is mainly continuous time and continuous amplitude in nature. This is a very important consideration since it stops the analog nature from propagating up in the hierarchy, right at the interface level. The analog design, modeling, and simulation constraints of the system are thus vastly simplified. An analogy can be drawn here to a flip-flop and its fundamental ...