Chapter 2. Technical overview of the IBM Eserver pSeries High Performance Switch (HPS) 45
Hypervisor owns all system resources and provides an abstraction layer through which device
access and control is arbitrated. It is because of these functions that Hypervisor was chosen
to handle the HPS.
The HPS was originally intended to be a NUMA fast-cache adapter. To function as such, it
needed to be available prior to system boot. This required much of the switch chip
functionality to become part of system firmware, and only Hypervisor had the necessary
hooks to provide abstraction of system resources. While the NUMA on POWER4 plans have
been dropped, the HPS remains. There is insufficient room in the switch microcode to offload
these functions from Hypervisor, and as such, the HPS will always require that the CEC be in
LPAR Ready mode and even if there were room, it would be a complete redesign.
Once the switch is installed, fully configure the Switch Network Manager prior to powering up
the CEC. Failure to do so may prohibit use of the switch due to improper frame identification
within the HMC, thereby crippling its ability to identify components within the switch network.
SNM configuration can be done within the HMC GUI, or through /opt/hsc/data/HmcNetConfig.
2.4 Hardware Management Console (HMC)
To use an IBM Eserver pSeries High Performance Switch (HPS), a 7315-C01 equivalent or
better HMC is required. In supporting this class of machine, the initial HPS offering was
limited to 32 switch nodes except by special bid. This is primarily because of HMC
performance considerations. This limitation is expected to be removed by the next major HMC
release and may require the next HMC GA level.
The version of the HMC code required for installing the pSeries HPS is R3V2.4 or later. We
highly recommend V3.2.5 or later, since its Switch Network Manager is more stable. Check
for the latest version of HMC code at:
Initial releases of the HPS require that Switch Network Manager (SNM) corrective service be
applied to the HMC, This corrective service, internally known as update.zip, will be tailored to
match the firmware and device driver levels provided. Eventually we expect that this will either
be synchronized and stabilized within HMC updates or will be provided as a separately
Sizing and performance
The Hardware Server (hrdw_svr) subsystem can coordinate multiple hrdw_srv processes
running on different HMCs (as a single virtual hrdw_srv image). This will allow more than one
HMC to share the load of larger HPS installations.
In the future, a non-HMC machine may be allowed to be the Switch Network Manager and
Hardware Server. To help facilitate this, new firmware images may be made available that
preconfigure the LPARs and remove the need for the HMC.
In order to increase performance of the overall HMC interface, much of the CIMOM code was
moved from disk to RAM.
Restriction: Due to their reliance upon Hypervisor functionality, switch adapters cannot be
dynamically allocated (DLPAR).