Chapter 3. Robust Digital Communication

Digital communication is the backbone of any system. Low-frequency, short-transit data across a printed circuit board (PCB) is usually straightforward. But when data moves off a board, goes a distance, or encounters electromagnetic interference (EMI), challenges arise. Also, ensuring reliable data at high speeds requires special attention to signaling methods, transmission lines, error handling, and clock/data phasing. Countless systems work on the bench and then fail in the field due to environmental challenges. Properly designed systems must survive real-world EMI, electrostatic discharge (ESD), variable power, and noisy grounds.

This isn’t a chapter on data communications theory. The intention is to give an understanding of widely used methods so that readers can make informed decisions regarding what interface to use or where they need a transmission line. Limited coverage is also given to older methods that designers should be aware of.

Commentary here is about CMOS logic. Special considerations for other logic families (RTL, TTL, ECL, etc.) are not given. Modern methods put logic functions in controller software or single field-programmable gate arrays/complex programmable logic devices (FPGAs/CPLDs). (Nobody uses a PCB full of discrete NAND gates anymore.) Multiple high-speed data paths are now inside the chip, not across the PCB. Consequently, most PCB digital communication now falls into one of two categories: low data rate setup ...

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