Bibliography

  1. [ACK 99] ACKENHUSEN J.G., Real Time Signal Processing: Design and Implementation of Signal Processing Systems, Prentice Hall PTR, Indianapolis, 1999.
  2. [ADS 16] ADSC, “ADSC research highlights: synthesize hardware, without hardware expertise”, available at: https://adsc.illinois.edu/research/adsc-research-highlights/adsc-research-highlights-synthesize-hardware-without-hardware-expe, January 2016.
  3. [AGU 05] AGUIRRE M.A., TOMBS J.N. et al., “Microprocessor and FPGA interfaces for in–system co–debugging in field programmable hybrid systems”, Microprocessors and Microsystems, vol. 29, pp. 75–85, 2005.
  4. [AKG 14] AKGÜN D., “A practical parallel implementation for tdlms image filter on multicore processor”, Journal of RealTime Image Processing, pp. 1–12, 2014.
  5. [ALT 16] ALTERA, “NIOS II Gen2 Processor Reference Guide”, available at: https://www.altera.com/documentation/iga1420498949526.html, 2016.
  6. [AYG 09] AYGUADE E., COPTY N., DURAN A. et al., “The design of openmp tasks”, IEEE Transactions on Parallel and Distributed Systems, vol. 20, no. 3, pp. 404–418, 2009.
  7. [BAR 02] BARAT F., LAUWEREINS R., DECONINCK G. et al., “Reconfigurable instruction set processors from a hardware/software perspective”, IEEE Transactions on Software Engineering, vol. 28, no. 9, pp. 847–862, 2002.
  8. [BAR 17] BARNEY B., “Posix threads programming”, available at: https://computing.llnl.gov/tutorials/pthreads/, 2017.
  9. [BAR 14] BARTOVSKY J., DOKLADAL P., DOKL E. et al., “Parallel implementation of sequential ...

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