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Arduino: A Technical Reference by J. M. Hughes

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Appendix B. AVR ATmega Control Registers

The register summaries in this appendix are intended as a quick reference. This appendix is not a comprehensive description of each control register. For detailed descriptions of each control register for a particular MCU type, see the Atmel documentation. Pay special attention to the notes included with the control register summaries in the Atmel documents. Each MCU has a slightly different set of things to watch out for.

In general, reserved bits (marked with a “–”) should not be accessed. Registers in the range of 0x00 to 0x1F are directly bit-accessible with the SBI and CBI instructions (set I/O bit and clear I/O bit, respectively). Register addresses in parentheses are the SRAM addresses of the control registers, whereas the addresses not in parentheses reside in the 64-byte address space reserved for I/O control registers. The reserved locations can be used with the IN and OUT instructions, and the SRAM addresses must be accessed with the ST/STS/STD and LD/LDS/LDD instructions.

The information in this appendix was derived from the following Atmel technical documents, all of which are available from Atmel.com:

Document number Title

Atmel-8271I-AVR- ATmega-Datasheet_10/2014

Atmel ATmega48A/PA/88A/PA/168A/PA/328/P

2549Q–AVR–02/2014

Atmel ATmega640/V-1280/V-1281/V-2560/V-2561/V

7766F–AVR–11/10

Atmel ATmega16U4/ATmega32U4

 

ATmega168/328

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

(0xFF)

Reserved ...

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