ARM AND THUMB INSTRUCTION ENCODINGS
B.1. ARM INSTRUCTION SET ENCODINGS
B.2. THUMB INSTRUCTION SET ENCODINGS
B.3. PROGRAM STATUS REGISTERS
This appendix gives tables for the instruction set encodings of the 32-bit ARM and 16-bit Thumb instruction sets. We also describe the fields of the processor status registers cpsr and spsr.
Table B.1 summarizes the bit encodings for the 32-bit ARM instruction set architecture ARMv6. This table is useful if you need to decode an ARM instruction by hand. We’ve expanded the table to aid quick manual decode. Any bitmaps not listed are either unpredictable or undefined for ARMv6.
ARM instruction decode table.
To use Table B.1 efficiently, follow ...