13.3. 13.3 The MMX Programming Environment
The MMX architecture extends the Pentium architecture by adding the following:
Eight MMX registers (MM0..MM7)
Four MMX data types (packed bytes, packed words, packed double words, and quad words)
57 MMX instructions
13.3.1. 13.3.1 The MMX Registers
The MMX architecture adds eight 64-bit registers to the Pentium. The MMX instructions refer to these registers as MM0, MM1, MM2, MM3, MM4, MM5, MM6, and MM7. These are strictly data registers; you cannot use them to hold addresses nor are they suitable for calculations involving addresses.
Although MM0..MM7 appear as separate registers in the Intel architecture, the Pentium processors alias these registers with the FPU's registers (ST0..ST7). Each of the eight MMX ...
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