Built In Test for VLSI: Pseudorandom Techniques

9

Limitations of and Other Concerns Random Pattern Testing

This chapter deals with some of the difficulties encountered when incorporating built-in random pattern test into a digital system. Although the treatment here is not extensive, it is intended to alert the user to some of the important things to consider during the planning and design phase of a project. While no one of these problems is fatal, each must be dealt with in the context of the particular network design. Factors of technology, packaging, the intended application of the design, design time, and desired manufactured quality are all important in dealing with the concerns discussed here. Clearly, different design projects will deal with these concerns in different fashions, but each must address them.

9.1 INDETERMINATE STATES

In any digital system, there are combinations of data and control signals that can cause the state of a storage element to be unpredictable. An example of this indeterminate or “X” state is an SR flip-flop where both the set and reset signals are present. Unless specially designed to be set dominant (or reset dominant) the resulting state of the flip-flop is not predictable from the signals present. This is a simple case of a much more prevalent problem. In the design of a digital system, often ...