Compact MOSFET Models for VLSI Design

Preface

The microelectronics industry has witnessed an explosive progress in the capability to integrate components on a silicon chip with CMOS as the predominant technology. The present day System-on-Chip (SOC) contains billions of devices with the Metal–Oxide–Semiconductor (MOS) transistor forming the basic building block. The successful design of such a complex integrated system requires extensive computer simulation where an accurate and faithful mathematical description of the MOS transistor is an essential prerequisite. MOS characteristics, therefore, are described by a set of mathematical equations producing a compact model for the device. These models are ported into a SPICE circuit simulator for faithful representation of MOSFET characteristics. Models provide the communicating interface between design and manufacturing.

As the complexity and application domains of silicon chips continue to enlarge, the challenge to satisfy apparently conflicting conditions of precision and simplicity is demanding and formidable. The litmus test of a compact model describing the MOS transistor lies in its capability to describe the device characteristics in a way that it is computationally efficient and reliable to handle simulation of ever increasing complex circuits of an electronic system ensuring cost effectiveness and fast turn around time. Further, the model needs to be scalable, predictive for the generations of technology nodes to follow, and capable of addressing statistical process ...