Computer Architecture, 5th Edition

Index

Page references in bold represent figures and tables.

Numbers

2:1 cache rule of thumb, definition, B-29

80x86 See Intel 80x86 processors

A

ABC (Atanasoff Berry Computer), L-5

ABI See Application binary interface (ABI)

Absolute addressing mode, Intel 80x86, K-47

Accelerated Strategic Computing Initiative (ASCI)

ASCI Red, F-100

ASCI White, F-67, F-100

system area network history, F-101

Access 1/Access 2 stages, TI 320C55 DSP, E-7

Access bit

IA-32 descriptor table, B-52

Access time See also Average Memory Access Time (AMAT)

vs. block size, B-28

distributed-memory multiprocessor, 348

DRAM/magnetic disk, D-3

memory hierarchy basics, 77

miss penalties, 218, B-42

NUMA, 348

paging, B-43

shared-memory multiprocessor, 347 ...