O'Reilly logo

Computer Architecture, 5th Edition by David A. Patterson, John L. Hennessy

Stay ahead with the world's most comprehensive technology and business learning platform.

With Safari, you learn the way you learn best. Get unlimited access to videos, live online training, learning paths, books, tutorials, and more.

Start Free Trial

No credit card required

H

Hadoop, WSC batch processing, 437
Half adders, J-2
Half words
aligned/misaligned addresses, A-8
memory address interpretation, A-7 to A-8
MIPS data types, A-34
operand sizes/types, 12
as operand type, A-13 to A-14
Handshaking, interconnection networks, F-10
Hard drive, power consumption, 63
Hard real-time systems, definition, E-3 to E-4
Hardware
as architecture component, 15
cache optimization, 96
compiler scheduling support, L-30 to L-31
compiler speculation support
memory references, H-32
overview, H-27
preserving exception behavior, H-28 to H-32
description notation, K-25
energy/performance fallacies, 56
for exposing parallelism, H-23 to H-27
ILP approaches, 148, 214–215
interconnection networks, F-9
pipeline hazard ...

With Safari, you learn the way you learn best. Get unlimited access to videos, live online training, learning paths, books, interactive tutorials, and more.

Start Free Trial

No credit card required