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Computer Architecture, 5th Edition by David A. Patterson, John L. Hennessy

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O

Observed performance, fallacies, 57
Occupancy, communication bandwidth, I-3
Ocean application
characteristics, I-9 to I-10
distributed-memory multiprocessor, I-32
distributed-memory multiprocessors, I-30
example calculations, I-11 to I-12
miss rates, I-28
symmetric shared-memory multiprocessors, I-23
Offline reconstruction, RAID, D-55
Offload engines
network interfaces, F-8
TCP/IP reliance, F-95
Offset
addressing modes, 12
AMD64 paged virtual memory, B-55
block identification, B-7 to B-8
cache optimization, B-38
call gates, B-54
control flow instructions, A-18
directory-based cache coherence protocols, 381–382
example, B-9
gather-scatter, 280
IA-32 segment, B-53
instruction decode, ...

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