Computer Organization and Design

Computer Organization and Design

by John L. Hennessy, David A. Patterson
Released May 2014
Publisher(s): Morgan Kaufmann
ISBN: 9781483221182

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Book description

Computer Organization and Design: The Hardware/Software Interface presents the interaction between hardware and software at a variety of levels, which offers a framework for understanding the fundamentals of computing. This book focuses on the concepts that are the basis for computers.

Organized into nine chapters, this book begins with an overview of the computer revolution. This text then explains the concepts and algorithms used in modern computer arithmetic. Other chapters consider the abstractions and concepts in memory hierarchies by starting with the simplest possible cache. This book discusses as well the complete data path and control for a processor. The final chapter deals with the exploitation of parallel machines.

This book is a valuable resource for students in computer science and engineering. Readers with backgrounds in assembly language and logic design who want to learn how to design a computer or understand how a system works will also find this book useful.

Table of contents

  1. Cover
  2. Title Page
  3. Copyright
  4. Dedication
  5. Foreward
  6. Table of Contents
  7. Preface
    1. About this Book
    2. Relationship to CA:AQA
    3. Learning by Evolution
    4. Learning from this Book
    5. Course Syllabi and this Book
    6. Chapter Organization and Overview
    7. Selection of Material
    8. Concluding Remarks
    9. Acknowledgements
    10. The SPIM Simulator for the MIPS R2000/R3000
      1. Retrieval of the SPIM by FTP
  8. Chapter 1: Computer Abstractions and Technology (1/9)
  9. Chapter 1: Computer Abstractions and Technology (2/9)
  10. Chapter 1: Computer Abstractions and Technology (3/9)
  11. Chapter 1: Computer Abstractions and Technology (4/9)
  12. Chapter 1: Computer Abstractions and Technology (5/9)
  13. Chapter 1: Computer Abstractions and Technology (6/9)
  14. Chapter 1: Computer Abstractions and Technology (7/9)
  15. Chapter 1: Computer Abstractions and Technology (8/9)
  16. Chapter 1: Computer Abstractions and Technology (9/9)
  17. Chapter 2: The Role of Performance (1/10)
  18. Chapter 2: The Role of Performance (2/10)
  19. Chapter 2: The Role of Performance (3/10)
  20. Chapter 2: The Role of Performance (4/10)
  21. Chapter 2: The Role of Performance (5/10)
  22. Chapter 2: The Role of Performance (6/10)
  23. Chapter 2: The Role of Performance (7/10)
  24. Chapter 2: The Role of Performance (8/10)
  25. Chapter 2: The Role of Performance (9/10)
  26. Chapter 2: The Role of Performance (10/10)
  27. Chapter 3: Instructions: Language of the Machine (1/15)
  28. Chapter 3: Instructions: Language of the Machine (2/15)
  29. Chapter 3: Instructions: Language of the Machine (3/15)
  30. Chapter 3: Instructions: Language of the Machine (4/15)
  31. Chapter 3: Instructions: Language of the Machine (5/15)
  32. Chapter 3: Instructions: Language of the Machine (6/15)
  33. Chapter 3: Instructions: Language of the Machine (7/15)
  34. Chapter 3: Instructions: Language of the Machine (8/15)
  35. Chapter 3: Instructions: Language of the Machine (9/15)
  36. Chapter 3: Instructions: Language of the Machine (10/15)
  37. Chapter 3: Instructions: Language of the Machine (11/15)
  38. Chapter 3: Instructions: Language of the Machine (12/15)
  39. Chapter 3: Instructions: Language of the Machine (13/15)
  40. Chapter 3: Instructions: Language of the Machine (14/15)
  41. Chapter 3: Instructions: Language of the Machine (15/15)
  42. Chapter 4: Arithmetic for Computers (1/21)
  43. Chapter 4: Arithmetic for Computers (2/21)
  44. Chapter 4: Arithmetic for Computers (3/21)
  45. Chapter 4: Arithmetic for Computers (4/21)
  46. Chapter 4: Arithmetic for Computers (5/21)
  47. Chapter 4: Arithmetic for Computers (6/21)
  48. Chapter 4: Arithmetic for Computers (7/21)
  49. Chapter 4: Arithmetic for Computers (8/21)
  50. Chapter 4: Arithmetic for Computers (9/21)
  51. Chapter 4: Arithmetic for Computers (10/21)
  52. Chapter 4: Arithmetic for Computers (11/21)
  53. Chapter 4: Arithmetic for Computers (12/21)
  54. Chapter 4: Arithmetic for Computers (13/21)
  55. Chapter 4: Arithmetic for Computers (14/21)
  56. Chapter 4: Arithmetic for Computers (15/21)
  57. Chapter 4: Arithmetic for Computers (16/21)
  58. Chapter 4: Arithmetic for Computers (17/21)
  59. Chapter 4: Arithmetic for Computers (18/21)
  60. Chapter 4: Arithmetic for Computers (19/21)
  61. Chapter 4: Arithmetic for Computers (20/21)
  62. Chapter 4: Arithmetic for Computers (21/21)
  63. Chapter 5: The Processor: Datapath and Control (1/19)
  64. Chapter 5: The Processor: Datapath and Control (2/19)
  65. Chapter 5: The Processor: Datapath and Control (3/19)
  66. Chapter 5: The Processor: Datapath and Control (4/19)
  67. Chapter 5: The Processor: Datapath and Control (5/19)
  68. Chapter 5: The Processor: Datapath and Control (6/19)
  69. Chapter 5: The Processor: Datapath and Control (7/19)
  70. Chapter 5: The Processor: Datapath and Control (8/19)
  71. Chapter 5: The Processor: Datapath and Control (9/19)
  72. Chapter 5: The Processor: Datapath and Control (10/19)
  73. Chapter 5: The Processor: Datapath and Control (11/19)
  74. Chapter 5: The Processor: Datapath and Control (12/19)
  75. Chapter 5: The Processor: Datapath and Control (13/19)
  76. Chapter 5: The Processor: Datapath and Control (14/19)
  77. Chapter 5: The Processor: Datapath and Control (15/19)
  78. Chapter 5: The Processor: Datapath and Control (16/19)
  79. Chapter 5: The Processor: Datapath and Control (17/19)
  80. Chapter 5: The Processor: Datapath and Control (18/19)
  81. Chapter 5: The Processor: Datapath and Control (19/19)
  82. Chapter 6: Enhancing Performance with Pipelining (1/18)
  83. Chapter 6: Enhancing Performance with Pipelining (2/18)
  84. Chapter 6: Enhancing Performance with Pipelining (3/18)
  85. Chapter 6: Enhancing Performance with Pipelining (4/18)
  86. Chapter 6: Enhancing Performance with Pipelining (5/18)
  87. Chapter 6: Enhancing Performance with Pipelining (6/18)
  88. Chapter 6: Enhancing Performance with Pipelining (7/18)
  89. Chapter 6: Enhancing Performance with Pipelining (8/18)
  90. Chapter 6: Enhancing Performance with Pipelining (9/18)
  91. Chapter 6: Enhancing Performance with Pipelining (10/18)
  92. Chapter 6: Enhancing Performance with Pipelining (11/18)
  93. Chapter 6: Enhancing Performance with Pipelining (12/18)
  94. Chapter 6: Enhancing Performance with Pipelining (13/18)
  95. Chapter 6: Enhancing Performance with Pipelining (14/18)
  96. Chapter 6: Enhancing Performance with Pipelining (15/18)
  97. Chapter 6: Enhancing Performance with Pipelining (16/18)
  98. Chapter 6: Enhancing Performance with Pipelining (17/18)
  99. Chapter 6: Enhancing Performance with Pipelining (18/18)
  100. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (1/16)
  101. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (2/16)
  102. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (3/16)
  103. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (4/16)
  104. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (5/16)
  105. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (6/16)
  106. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (7/16)
  107. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (8/16)
  108. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (9/16)
  109. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (10/16)
  110. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (11/16)
  111. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (12/16)
  112. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (13/16)
  113. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (14/16)
  114. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (15/16)
  115. Chapter 7: Large and Fast: Exploiting Memory Hierarchy (16/16)
  116. Chapter 8: Interfacing Processors and Peripherals (1/13)
  117. Chapter 8: Interfacing Processors and Peripherals (2/13)
  118. Chapter 8: Interfacing Processors and Peripherals (3/13)
  119. Chapter 8: Interfacing Processors and Peripherals (4/13)
  120. Chapter 8: Interfacing Processors and Peripherals (5/13)
  121. Chapter 8: Interfacing Processors and Peripherals (6/13)
  122. Chapter 8: Interfacing Processors and Peripherals (7/13)
  123. Chapter 8: Interfacing Processors and Peripherals (8/13)
  124. Chapter 8: Interfacing Processors and Peripherals (9/13)
  125. Chapter 8: Interfacing Processors and Peripherals (10/13)
  126. Chapter 8: Interfacing Processors and Peripherals (11/13)
  127. Chapter 8: Interfacing Processors and Peripherals (12/13)
  128. Chapter 8: Interfacing Processors and Peripherals (13/13)
  129. Chapter 9: Parallel Processors (1/12)
  130. Chapter 9: Parallel Processors (2/12)
  131. Chapter 9: Parallel Processors (3/12)
  132. Chapter 9: Parallel Processors (4/12)
  133. Chapter 9: Parallel Processors (5/12)
  134. Chapter 9: Parallel Processors (6/12)
  135. Chapter 9: Parallel Processors (7/12)
  136. Chapter 9: Parallel Processors (8/12)
  137. Chapter 9: Parallel Processors (9/12)
  138. Chapter 9: Parallel Processors (10/12)
  139. Chapter 9: Parallel Processors (11/12)
  140. Chapter 9: Parallel Processors (12/12)
  141. Appendix A: Assemblers, Linkers, and the SPIM Simulator (1/15)
  142. Appendix A: Assemblers, Linkers, and the SPIM Simulator (2/15)
  143. Appendix A: Assemblers, Linkers, and the SPIM Simulator (3/15)
  144. Appendix A: Assemblers, Linkers, and the SPIM Simulator (4/15)
  145. Appendix A: Assemblers, Linkers, and the SPIM Simulator (5/15)
  146. Appendix A: Assemblers, Linkers, and the SPIM Simulator (6/15)
  147. Appendix A: Assemblers, Linkers, and the SPIM Simulator (7/15)
  148. Appendix A: Assemblers, Linkers, and the SPIM Simulator (8/15)
  149. Appendix A: Assemblers, Linkers, and the SPIM Simulator (9/15)
  150. Appendix A: Assemblers, Linkers, and the SPIM Simulator (10/15)
  151. Appendix A: Assemblers, Linkers, and the SPIM Simulator (11/15)
  152. Appendix A: Assemblers, Linkers, and the SPIM Simulator (12/15)
  153. Appendix A: Assemblers, Linkers, and the SPIM Simulator (13/15)
  154. Appendix A: Assemblers, Linkers, and the SPIM Simulator (14/15)
  155. Appendix A: Assemblers, Linkers, and the SPIM Simulator (15/15)
  156. Appendix B: The Basics of Logic Design (1/10)
  157. Appendix B: The Basics of Logic Design (2/10)
  158. Appendix B: The Basics of Logic Design (3/10)
  159. Appendix B: The Basics of Logic Design (4/10)
  160. Appendix B: The Basics of Logic Design (5/10)
  161. Appendix B: The Basics of Logic Design (6/10)
  162. Appendix B: The Basics of Logic Design (7/10)
  163. Appendix B: The Basics of Logic Design (8/10)
  164. Appendix B: The Basics of Logic Design (9/10)
  165. Appendix B: The Basics of Logic Design (10/10)
  166. Appendix C: Mapping Control to Hardware (1/6)
  167. Appendix C: Mapping Control to Hardware (2/6)
  168. Appendix C: Mapping Control to Hardware (3/6)
  169. Appendix C: Mapping Control to Hardware (4/6)
  170. Appendix C: Mapping Control to Hardware (5/6)
  171. Appendix C: Mapping Control to Hardware (6/6)
  172. Appendix D: Introducing C to Pascal Programmers (1/7)
  173. Appendix D: Introducing C to Pascal Programmers (2/7)
  174. Appendix D: Introducing C to Pascal Programmers (3/7)
  175. Appendix D: Introducing C to Pascal Programmers (4/7)
  176. Appendix D: Introducing C to Pascal Programmers (5/7)
  177. Appendix D: Introducing C to Pascal Programmers (6/7)
  178. Appendix D: Introducing C to Pascal Programmers (7/7)
  179. Index (1/5)
  180. Index (2/5)
  181. Index (3/5)
  182. Index (4/5)
  183. Index (5/5)

Product information

  • Title: Computer Organization and Design
  • Author(s): John L. Hennessy, David A. Patterson
  • Release date: May 2014
  • Publisher(s): Morgan Kaufmann
  • ISBN: 9781483221182