Chapter 9. Coprocessor Generation from Executable Code
Richard Taylor and David Stewart
Previous chapters have discussed various techniques for the configuration of embedded processors. Both manual specification of instruction extensions using ADLs (Chapter 4) and largely automated techniques for instruction discovery (Chapters 6 and 7) have been covered. Customized instructions require customized tool chains in order for them to be easily targeted, and this has been discussed in Chapters 5 and 8. This chapter covers a somewhat different approach to the problem that is motivated by the desire for an efficient design flow in the context of multiprocessor SoCs. In this approach, the ASIP is treated as an autonomously executing coprocessor, acting ...
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