Chapter 13. Sub-RISC Processors
Andrew Mihal, Scott Weber, and Kurt Keutzer
The now-common phrase “the processor is the NAND gate of the future” begs the questions: “What kind of processor?” and “How to program them?” In the previous chapters, the focus was placed on RISC-based processors augmented with instruction extensions as the natural building block. The presumption is that programming will be done in C. This chapter challenges this viewpoint. Our opinion is than even a RISC processor is too coarse-grained for typical embedded applications, and that C is insufficient for programming a multiprocessor architecture. As an alternative, we explore the design and deployment of tiny sub-RISC processors as the “NAND gate of the future.” With Tiny ...
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