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Dedicated Digital Processors: Methods in Hardware/Software Co-Design by F. Mayer-Lindenberg

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6

Sequential Processors

This chapter deals with the design of programmable processors and builds on the techniques developed in the previous chapters. If all basic operations executed by a digital system are executed in sequence using a single multifunction ALU (arithmetic and logic unit) circuit controlled by a memory table-based automaton as in Figure 5.5, one arrives at the concept of a sequential processor controlled by an instruction memory. The CPU (central processing unit) of a processor system includes a single control automaton that is applied to control one or a few multifunction compute circuits constituting the ALU. An ALU capable of performing several operations in parallel will be able to execute the blocks of operations of a given data and control flow faster provided that they include parallel compositions.

According to the discussion in the previous chapter, the ALU circuit inputs from and outputs to a storage automaton, the storage capacity of which depends on the application, e.g. a single port RAM in conjunction with some registers loaded in sequence from it to provide the required number of operands in parallel. The ALU and the attached registers and associated select circuits constitute the data path within the CPU. The instruction memory is a configurable, universal structure. It can hold arbitrary sequences of function and select codes and jump instructions; the resulting processor plus memory structure shown in Figure 6.1 can hence implement many algorithms. ...

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