Chapter 4: Architecture

Abstract

This chapter describes various part of the Armv8-M architecture including the programmer's model, memory system, exceptions and interrupts handling, debug, reset and startup sequence, etc.

Keywords

Programmer's model; Special registers; Memory map; Stack operations; Floating-point unit (FPU); Exceptions and interrupts; Nested Vectored Interrupt Controller (NVIC); TrustZone; Debug; Reset

4.1: Introduction to the Armv8-M architecture

4.1.1: Overview

Arm® Cortex®-M23 and Cortex-M33 processors are based on the Armv8-M architecture. The architecture document—Armv8-M architecture reference manual—is a massive document with over 1000 pages [1]. It covers many aspects of the processor including:

  • - Programmer's ...

Get Definitive Guide to Arm Cortex-M23 and Cortex-M33 Processors now with the O’Reilly learning platform.

O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.