Chapter 16: Introduction to the debug and trace features
Abstract
This chapter describes the debug architecture used in the Cortex-M23 and Cortex-M33 processors. It covers the range of debug and trace features available, such as breakpoint, watchpoint, the debug monitor, instruction trace, selective data trace, profiling, exception trace, PC sampling, debug authentication, etc. This chapter also describes the programmer's model for the key debug components, the support of ITM in CMSIS-CORE and other software design considerations related to debugging.
Keywords
CoreSight architecture; Debug connection; Embedded Trace Macrocell (ETM); Micro Trace Buffer (MTB); Trace Port Interface Unit (TPIU); Data Watchpoint and Trace (DWT); Breakpoint ...
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