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Design for Embedded Image Processing on FPGAs
book

Design for Embedded Image Processing on FPGAs

by Donald G. Bailey
August 2011
Beginner to intermediate
416 pages
20h 4m
English
Wiley-IEEE Press
Content preview from Design for Embedded Image Processing on FPGAs

References

1394 Trade Association (2004) 1394-based Digital Camera Specification, Vol. Version 1.31, 1394 Trade Association.

Abd Elghany, M.A., Salama, A.E. and Khalil, A.H. (2007) Design and implementation of FPGA-based systolic array for LZ data compression. IEEE International Symposium on Circuits and Systems (ISCAS 2007), New Orleans, Louisiana, USA (27–30 May, 2007), pp. 3691– 3695. doi: 10.1109/ISCAS.2007.378644

Abdou, I.E. and Pratt, W.K. (1979) Quantitative design and evaluation of edge enhancement/thresholding edge detectors. Proceedings of the IEEE, 67 (5), 753–763. doi: 10.1109/PROC.1979.11325

AbuBaker, A., Qahwaji, R., Ipson, S. and Saleh, M. (2007) One scan connected component labeling technique. IEEE International Conference on Signal Processing and Communications (ICSPC 2007), Dubai, United Arab Emirates (24–27 November, 2007), pp. 1283– 1286. doi: 10.1109/ICSPC.2007.4728561

Achronix (2009) Speedster FPGA Family, Vol. DS001 Rev 1.1, Achronix Semiconductor Corporation.

Actel (2008a) IGLOO Low-Power Flash FPGAs, vol. v1.3, Actel Corporation.

Actel (2008b) ProASIC3 Flash Family FPGAs, vol. v1.0, Actel Corporation.

Actel (2009) Axcelerator Family FPGAs, vol. c2.8, Actel Corporation.

Actel (2010) Actel's SmartFusion Intelligent Mixed-Signal FPGAs, Vol. Rev 1, Actel Corporation.

Aeroflex (2008) UT6325 RadTol Eclipse FPGA Data Sheet, Aeroflex Incorporated.

Agostini, L.V., Silva, I.S. and Bampi, S. (2001) Pipelined fast 2D DCT architecture for JPEG image compression.

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Publisher Resources

ISBN: 9780470828496Purchase book