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Design Recipes for FPGAs, 2nd Edition by Peter Wilson

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Chapter 7

High Speed Video Application

Abstract

This application is designed to show how several high data rate applications can be handled using VHDL on FPGAs. The system consists of a high speed camera, processor core, disk drive interface, RAM interface and serial link to an external PC. The overall system has been chosen to illustrate how to move large amounts of data around quickly and efficiently. The outline of such a test application is shown in the figure below. As can be seen, there are several key aspects involved, but mainly it is about moving large amounts of data around a system quickly, efficiently, and reliably.

Keywords

High speed video

System design

FPGA application

7.1 Introduction

This application is designed to show how ...

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