10.7. Input and Output Queue Interfaces
In addition to the 32-bit input and output ports discussed in the previous section, the Diamond 570T CPU core has a 32-bit input-queue interface and a 32-bit output queue interface. These queue interfaces, respectively, connect directly to the head or tail of a FIFO memory. Each queue interface has a pair of hardware handshaking wires that automatically sequence the flow of data between the attached FIFO memory and the processor. The input-queue handshake signals are called PopReq (Pop Request) and Empty. The output-queue handshake signals are called PushReq (Push Request) and Full.
Table 10.7 lists the instructions added to the Diamond 570T CPU to manage the input and output queue interfaces.
Get Designing SOCs with Configured Cores now with the O’Reilly learning platform.
O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.
