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Designing SOCs with Configured Cores
book

Designing SOCs with Configured Cores

by Steve Leibson
August 2006
Intermediate to advanced
344 pages
9h 2m
English
Morgan Kaufmann
Content preview from Designing SOCs with Configured Cores

14.5. Accelerating an MPEG-4 Decoder

One of the most difficult parts of encoding MPEG-4 video data is motion estimation, which searches adjacent video frames for similar pixel blocks to detect inter-frame movement in the picture. The motion-estimation search algorithm’s inner loop contains an SAD (sum of absolute differences) operation consisting of a subtraction, an absolute value, and the addition of the resulting value with the previously computed value.

For a QCIF (quarter common image format, 176 × 144 pixels) image frame, a 15-Hz frame rate, and an exhaustive-search motion-estimation scheme, SAD operations require about 641 million operations/sec. As shown in Figure 14.3, it’s possible to add SIMD SAD hardware capable of executing 16 pixel-wide ...

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Publisher Resources

ISBN: 9780123724984