O'Reilly logo

Designing SOCs with Configured Cores by Steve Leibson

Stay ahead with the world's most comprehensive technology and business learning platform.

With Safari, you learn the way you learn best. Get unlimited access to videos, live online training, learning paths, books, tutorials, and more.

Start Free Trial

No credit card required

14.7. High-Speed I/O for Processor-Based Function Blocks

The two bottlenecks in high-speed SOC block design are I/O performance and computational performance. The previous sections in this chapter have discussed improvements in a processor’s computational performance through TIE-based extensions. This section and following sections discuss the ways that TIE can be used to improve a processor’s I/O performance.

Every microprocessor core’s main bus represents a major I/O bottleneck. All data into and out of the processor must pass over this main bus. Consequently, two factors constrain I/O traffic in and out of the processor. First, a bus can only perform one transfer at a time so other pending transfers must wait for the current transfer to clear. ...

With Safari, you learn the way you learn best. Get unlimited access to videos, live online training, learning paths, books, interactive tutorials, and more.

Start Free Trial

No credit card required