Chapter 15. Jitter and Signaling Testing for Chip-to-Chip Link Components and Systems
Mike Li
In this chapter, we first review the technology evolution path for computer chip-to-chip communications and I/O buses. We then discuss jitter and signaling tests for the specific chip-to-chip standard technologies of PCI Express, FBDIMM, and SATA, along with testing requirements, test methodologies, and illustrations of solutions from case studies. Lastly, we discuss future technologies that are promising for transferring data at rates of 10 Gbit/s or higher with low cost and high volume.
15.1. Introduction
Driven by increasing demands for delivering ...
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