Clock-driven sequential circuits
8.1 Introduction
In this chapter a design procedure will be established for the design and implementation of clock-driven sequential circuits. Such circuits have many applications in the digital field and consist of both combinational and memory elements. For an SSI design, members of one of the commonly used logic families would be employed in conjunction with either JK or D flip-flops. In this field JK flip-flops would probably be selected since their use normally leads to simpler circuit implementation. However, in recent years, enormous advances in technology have led to the introduction of a variety of large scale programmable devices (PLDs) and the flip-flops used as memory elements on these devices ...
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