REFERENCES

Afghahi, M., and Svensson, C. (1990). “A Unified Single-Phase Clocking Scheme for VLSI Systems.” IEEE Journal of Solid-State Circuits, vol. SC-25 (no. 1), February, p. 225-33.

Amdahl, G. M. (1964). “The Structure of System /360 Part III: Processing Unit Design Considerations.” IBM Systems Journal, vol. 3 (no. 2), p. 144-64.

Anderson, C. J., Petrovick, J., Keaty, J. M., Warnock, J., Nusbaum, G., Tendler, J. M., Carter, C., Chu, S., Clabes, J., DiLullo, J., Dudley, P., Harvey, P., Krauter, B., LeBlanc, J., Lu, P.-F., McCredie, B., Plum, G., Restle, P., Runyon, S., Scheuermann, M., Schmidt, S., Wagoner, J., Weiss, R., Weitzel, S., and Zoric, B. (2001). “Physical Design of a Fourth-Generation POWER GHz Microprocessor,” IEEE International Solid-State Circuits Conference, Digest of Technical Papers, p. 232-3.

Anderson, D. W., Sparacio, F. J., and Tomasulo, R. M. (1967). “The IBM System/360 Model 91: Machine Philosophy and Instruction Handling,” IBM Journal of Research and Development, vol. 11 (no. 1), p. 8-24.

Baeg, S., and Rogers, W. A. (1999). “A Cost-Effective Design for Testability: Clock Line Control and Test Generation Using Selective Clocking,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 18 (no. 6), June, p. 850-61.

Bailey, D. W., and Benschneider, B. J. (1998). “Clocking Design and Analysis for a 600-MHz Alpha Microprocessor,” IEEE Journal of Solid-State Circuits, vol. SC-33 (no. 11), November.

Benschneider, B. J. et al. (1995). ...

Get Digital System Clocking: High-Performance and Low-Power Aspects now with the O’Reilly learning platform.

O’Reilly members experience live online training, plus books, videos, and digital content from nearly 200 publishers.