October 2006
Intermediate to advanced
544 pages
14h 29m
English
Content preview from Digital Systems
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Chapter 13
Implementation of Combinational Logic by Programmable Logic Devices
OBJECTIVE
We learnt in Chapter 12 that instead of implementing a minimized circuit using AND-OR arrays or NANDs or OR-AND arrays or NORs or ICs for the decoders, encoders, multiplexers or demultiplexers, or binary arithmetic adders, adder/subtractors, code converters, comparator, bit-wise 8-bit AND, OR, XOR circuits or parity generators, a complex combinational circuit can be easily assembled by programmable logic memories (ROM, EPROM, EEPROM or Flash or OTP).
In this chapter, we shall learn about two other forms of PLDs called PAL and PLA. We shall also study the implementation of the circuits using PAL and PLA.
13.1 BASICS POINTS TO REMEMBER WHEN USING THE PLDS ...
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