1.2. Logic Design Automation

Logic design automation refers to all modeling, synthesis, and verification steps that model a design specification of an electronic system at an electronic system level (ESL), verify the ESL design, and then compile or translate the ESL representation of the design into an RTL or gate-level representation. The design hierarchy illustrated in Figure 1.2 has described all the levels of abstraction down to physical design, a step solely responsible for physical design automation. In the design hierarchy, a higher level description has fewer implementation details but more explicit functional information than a lower level description. The design process illustrated in Figure 1.3 and the EDA process flow illustrated ...

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